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Semiconductor Company Spotlights
The AI and compute tier covers the companies whose silicon decisions are driving the largest demand signals in the semiconductor supply chain. NVIDIA's GPU concentration mirrors TSMC's foundry concentration on the demand side - ~80% of AI training accelerator revenue concentrated in one company, manufactured at one foundry, packaged with one advanced packaging process, using one primary HBM supplier. The hyperscaler custom ASIC programs represent the structural response to this concentration - and they compete for the same upstream supply chain rather than relieving it.
| Spotlight | Headquarters | SX supply chain significance | Key coverage |
|---|---|---|---|
| NVIDIA | Santa Clara, California, US | ~80% AI training accelerator market share. The demand-side equivalent of TSMC - a single-company concentration point whose supply chain dependencies cascade across the entire AI infrastructure build-out. CUDA ecosystem lock-in makes substitution structurally slow. Vera Rubin platform (GTC 2026) adds Groq 3 LPU (Samsung 4nm) as the first significant non-TSMC chip in an NVIDIA platform. Space-1 Vera Rubin Module extends the Rubin architecture to orbital compute. | Hopper / Blackwell / Vera Rubin / Rubin Ultra / Feynman GPU roadmap; CUDA ecosystem lock-in; TSMC N4P/N3 dependency; CoWoS packaging dependency; SK Hynix HBM3e/HBM4 dependency; NVLink interconnect; Groq 3 LPU acqui-hire ($20B, Dec 2025); Space-1 Vera Rubin Module (GTC 2026); China export control revenue impact; InfiniBand networking; automotive DRIVE platform |
| AMD | Santa Clara, California, US | The credible alternative to Intel in server CPU and to NVIDIA in AI accelerator - but dependent on TSMC for both, meaning AMD's growth adds TSMC N5/N4/N3 demand rather than diversifying the supply chain. EPYC Turin (192-core Zen 5c) is the highest core-count x86 server CPU. MI300X is the leading NVIDIA GPU alternative for inference serving. Chiplet architecture is AMD's manufacturing and design moat. | EPYC Turin/Genoa server CPU chiplet architecture; MI300X/MI350X/MI400 AI accelerator roadmap; Radeon RX 9000 RDNA 4 discrete GPU; Ryzen AI 300 (Strix Point) PC SoC; Ryzen AI MAX (Strix Halo) workstation APU; AMD/Xilinx FPGA (Alveo, Versal); ROCm vs CUDA competitive position; TSMC N4P/N5 dependency; Samsung SF4 dual-source strategy |
| Huawei / HiSilicon | Shenzhen, China | The primary case study in semiconductor export control policy and domestic self-sufficiency strategy. HiSilicon designs leading-edge SoCs (Kirin for handsets, Ascend for AI, Kunpeng for server); SMIC manufactures them at the DUV-only N+1 (~7nm equivalent) process. Huawei Ascend 910B/910C is Beijing's mandated NVIDIA alternative for Chinese AI infrastructure. The Kirin 9010 story validated the commercial-foundry-under-sanctions thesis. | Kirin 9010 / Kirin 9020 SoC at SMIC N+1 - the export control case study; Ascend 910B/910C AI accelerator - China's domestic NVIDIA alternative; CANN software framework vs CUDA; Beijing September 2025 directive (stop buying NVIDIA GPUs); Huawei RAN infrastructure semiconductor supply chain; gallium/germanium counter-leverage; HarmonyOS silicon integration; performance gap to TSMC-manufactured silicon |
Automotive, Robotics & Industrial
The automotive and industrial tier covers the companies whose silicon programs are driving the most structurally complex supply chain dynamics in the physical economy. Tesla's Terafab vertical integration program, Infineon's SiC dominance in automotive power, and the humanoid robot semiconductor supply chain are all generating demand signals that the semiconductor industry was not designed to accommodate at current scale or timeline.
| Spotlight | Headquarters | SX supply chain significance | Key coverage |
|---|---|---|---|
| Tesla EV | Austin, Texas, US | The most vertically integrated semiconductor program in the automotive sector. Tesla designs its own inference SoC (FSD/AI5, AI6, AI7/D3), controls its own primary foundry relationship (Samsung Taylor Texas - 10-year exclusive), and is building its own fab (Terafab) targeting AI6 and AI7 production. The three-chip family architecture (AI5, AI6, AI7/D3) serves EVs, robotaxis, humanoid robots, and orbital compute simultaneously from a single silicon design program. | FSD/AI5 chip - Samsung Taylor TX + TSMC Arizona dual-source; AI6 - Cybercab and Optimus Gen 3 target, primary Terafab program; AI7/D3 - orbital compute for Starlink (rad-tolerant LEO inference); Samsung Taylor captive fab (100%, 10-year agreement, Tesla engineers on-premises); Terafab architecture; Optimus robot semiconductor stack; CyberCab robotaxi semiconductor requirements |
| Humanoid Robots | Multiple (Tesla Austin TX; Figure Sunnyvale CA; Agility Robotics Corvallis OR; 1X Moss Norway; Boston Dynamics Waltham MA; Unitree Hangzhou China) | The most analytically undercovered semiconductor demand story of the 2026-2030 period. Humanoid robots require 300-400 analog and mixed-signal ICs per unit - GaN motor drive ICs, magnetic position encoders, MEMS IMUs, force-torque sensors, BMS ICs, and precision current sense amplifiers - from supply chains not sized for million-unit annual production. The inference SoC gets the headlines; the electromechanical control layer is the binding constraint. | Humanoid analog/mixed-signal thesis (300-400 ICs per robot, not the AI chip); GaN joint drive supply gap (EPC, TI LMG, Navitas - none sized for humanoid scale); ams-OSRAM AS5047P encoder concentration risk; force-torque sensor supply void; platform comparison (Tesla Optimus, Figure, Agility Digit, 1X NEO, Boston Dynamics Atlas, Unitree G1, Fourier GR-2); China humanoid bifurcation |
| Data Center | Multiple (AWS Seattle WA; Google Mountain View CA; Microsoft Redmond WA; Meta Menlo Park CA) | The hyperscaler custom ASIC wave - Google TPU, Amazon Trainium/Inferentia, Microsoft Maia, Meta MTIA - is the most significant structural shift in AI semiconductor demand since the GPU emerged as the training accelerator standard. Each hyperscaler program competes for TSMC N5/N3 wafer starts and CoWoS packaging capacity, adding demand to rather than relieving the upstream supply constraint. AWS alone will deploy over 1 million NVIDIA GPUs plus Groq LPUs in 2026. | Google TPU v5p/v5e (TSMC N5); Amazon Trainium2/Inferentia2 (TSMC N5); Microsoft Maia 100 (TSMC N5); Meta MTIA v2 (TSMC N5); AWS Graviton4, Google Axion, Microsoft Cobalt 100 ARM server CPUs; hyperscaler capex trajectories; Broadcom custom ASIC co-design revenue; GaN PSU demand from AI cluster power density; 48V rack power architecture transition |
Sector Programs
Sector programs are spotlight pages focused on specific supply chain programs, platforms, or ecosystem dynamics rather than a single company. They cover the supply chain story of a technology platform as a system - including multiple companies, multiple device categories, and the convergence dynamics that make the program supply-chain-significant.
| Spotlight | Primary companies | SX supply chain significance | Key coverage |
|---|---|---|---|
| Starlink / SpaceX | SpaceX (Hawthorne CA); xAI (Memphis TN); Starcloud; Aetherflux; Kepler Communications | The commercial satellite constellation program most responsible for redefining LEO orbital compute semiconductor requirements. Starlink's D3/AI7 orbital compute chip is the most ambitious commercial-foundry-for-space program. The NVIDIA Space-1 Vera Rubin Module announcement (GTC 2026) validates the commercial rad-tolerant orbital compute category that Starlink is creating. SpaceX's vertical integration (launch vehicle + satellite + chip design) gives it a deployment pathway no other orbital compute program can replicate. | D3 / AI7 chip - Terafab orbital compute (rad-tolerant, TSMC commercial node, TMR/ECC architectural mitigation); Starlink Gen 3 constellation semiconductor stack; NVIDIA Space-1 Vera Rubin Module (GTC 2026 - 25x H100 AI compute for orbit); IGX Thor orbital edge compute (radiation-approved, in-orbit now); three-tier NVIDIA space stack; commercial LEO radiation environment; SpaceX-xAI merger context; orbital datacenter economics debate |
| SiC Nine-Market Convergence | Wolfspeed, Infineon, STMicro, Onsemi, Rohm, SICC, TanKeBlue; automotive OEMs; BESS operators; solar inverter OEMs | The defining multi-sector supply chain convergence story on SX. Nine demand markets - EV traction inverters, EV OBC, EVSE DC fast chargers, BESS PCS, solar string inverters, industrial VFDs, solid-state transformers, datacenter UPS, humanoid robot joint drives - drawing from the same SiC substrate funnel simultaneously. Wolfspeed restructuring is the live supply chain crisis event. The nine-market convergence is the reason SiC is the most structurally important supply chain chokepoint in the physical economy through 2030. | Nine-market demand mapping with growth rates; SiC boule growth physics constraint; 150mm to 200mm transition as the primary volume multiplier; Wolfspeed Chapter 11 - causes, customer impact, Western supply implications; SICC and TanKeBlue Chinese domestic SiC ramp; per-supplier capacity status (Wolfspeed, Infineon, STMicro, Onsemi, Rohm, SICC); solid-state transformer as sixth emerging demand node; qualification timelines per market |
| China Semiconductor Bifurcation | SMIC, Hua Hong, CXMT, Huawei HiSilicon, YMTC; vs TSMC, Samsung, Micron, SK Hynix, ASML, Applied Materials, Lam Research, KLA | The most structurally significant geopolitical supply chain event of the decade. The bifurcation is not just AI chips - it encompasses foundry (SMIC vs TSMC), DRAM (CXMT vs Samsung/Micron/SK Hynix), NAND (YMTC vs Samsung/Kioxia/Micron), equipment (NAURA/AMEC vs ASML/Applied/Lam/KLA), EDA (Empyrean vs Synopsys/Cadence), and increasingly 5G infrastructure (Huawei vs Ericsson/Nokia). Each layer reinforces the others into a structurally separate supply ecosystem. | SMIC N+1 (~7nm equivalent with DUV only); EUV export control mechanism and FDPR; Beijing September 2025 GPU directive; Huawei Ascend 910B/910C vs NVIDIA Blackwell performance gap; CXMT HBM development (domestic HBM alternative); YMTC 3D NAND (232-layer, Xinjiang subsidiary issues); gallium/germanium export counter-leverage; Chinese domestic equipment (NAURA, AMEC, SMEE) capability gap; 28nm as geopolitical frontier |
| Tesla Terafab | Tesla (Austin TX); Samsung Semiconductor (Taylor TX); TSMC Arizona | Tesla's internal semiconductor manufacturing program - the most significant new fab investment by a non-foundry automotive/tech company in history. The three-chip family (AI5 external dual-fab; AI6 primary Terafab program; AI7/D3 orbital compute) defines the supply chain for Tesla's entire AI-physical product portfolio. Samsung Taylor Texas as the AI5 100% captive foundry with a 10-year exclusivity agreement and Tesla engineers on-premises is the most unusual manufacturing arrangement in the industry. | See: Tesla Terafab Supply Chain - dedicated deep-dive page covering the full three-chip architecture, Samsung Taylor captive arrangement, Terafab location and capacity, AI6 vs AI7 program distinctions, and Optimus robot semiconductor integration |
Related Coverage: Sectors Hub | Chip Types Hub | Bottleneck Atlas | Materials & IP Hub | Fab & Assembly Hub | SiC & GaN - Nine Markets, One Wafer Funnel | Tesla Terafab Supply Chain