Huawei and HiSilicon

Spotlight · Ascend, Kirin, SMIC N+2 and N+3, HBM stockpile, CXMT · China's domestic AI chip chain

Huawei shipped 572,000 data center AI accelerators in China in the first half of 2026, 28% of the market against NVIDIA's 34%. Every working link in its chain is in China or draws on HBM stockpiled before the 2024 controls, so memory, not wafers, sets how many Ascend chips it can build.

China data center AI accelerator market, first half of 2026, by units (IDC): NVIDIA 34%, Huawei 28%, Alibaba T-Head 7%, Cambricon 5%, Kunlunxin 4%, Hygon 3%, all others 19%. Huawei shipped 572,000 accelerators, up from more than 300,000 a year earlier; NVIDIA shipped 678,000, down 44%, from about 1.21 million (computed). CHINA DATA CENTER AI ACCELERATORS, 1H 2026, SHARE OF UNITS NVIDIA 34% Huawei 28% Alibaba T-Head 7% Cambricon 5% Kunlunxin 4% Hygon 3% All others 19% CHINESE VENDORS NAMED BY IDC: 47% COMBINED. OTHERS NOT BROKEN OUT. UNITS SHIPPED IN CHINA, FIRST HALF NVIDIA 1H 2025 ~1.21M (computed) NVIDIA 1H 2026 678,000 Huawei 1H 2025 300,000+ Huawei 1H 2026 572,000 IDC VIA REUTERS AND TECHNODE, OCTOBER 14, 2026. NVIDIA 1H 2025 BACK-CALCULATED FROM ITS 44% DECLINE.
China share, 1H 2026
28% (NVIDIA 34%)
Ascend units, 1H 2026
572,000
Logic foundry
SMIC N+2, N+3
HBM
Stockpile, CXMT
US-made links
None of seven
Hub
Spotlights

Market share

Huawei Shipped 572,000 AI Accelerators in China in the First Half of 2026

That is 28% of China's data center accelerators by units, against NVIDIA's 34%, and the gap is closing from both ends.

China data center AI accelerator market, first half of 2026 (IDC)
VendorShare of unitsUnitsLogic foundry
NVIDIA34%678,000, down 44% year on yearTSMC
Huawei28%572,000, up from more than 300,000SMIC
Alibaba T-Head7%Not reportedNot disclosed
Cambricon5%Not reportedSMIC (reported)
Kunlunxin (Baidu)4%Not reportedNot disclosed
Hygon3%Not reportedNot disclosed
All others19%Not reportedMixed

IDC tracked 11 Chinese suppliers, and nine of them shipped more than a year earlier. The vendors IDC names add to 47% of units, against 41% for Chinese chips across 2025. NVIDIA's units fell because US licensing limits what it can sell in China, not because demand fell: Reuters reported in January 2026 that Chinese orders for the H200 passed two million.

Huawei sells systems as well as chips. The Atlas 900 A3 SuperPoD (CloudMatrix 384) links 384 Ascend 910C chips and is sold to Alibaba, Tencent, Baidu, ByteDance and DeepSeek, among others. Huawei makes up for a weaker chip with more of them per system, and pays for it in power: the 384-chip system is reported to draw about 560 kW.

Supply chain

Every Ascend Link Is in China or Comes From Stock Bought Before the Controls

The Ascend supply chain. HiSilicon in Shenzhen designs the chip. Logic dies come from SMIC in Shanghai on its N+2 and N+3 processes. HBM comes from a stockpile of Samsung and SK hynix stacks bought before the December 2024 controls, from CXMT in Hefei, and from Huawei-designed memory in the Ascend 950. Packaging and test are done in China. Routes that are cut: TSMC since 2020 (a bank of TSMC dies bought through Sophgo is used up), ASML EUV scanners never shipped to China, and new HBM imports since December 2024. DESIGN LOGIC DIE MEMORY PACKAGE AND TEST SYSTEM HiSilicon SHENZHEN, CHINA SMIC N+2, N+3 SHANGHAI, CHINA CXMT HBM HEFEI, CHINA Huawei HiBL, HiZQ IN ASCEND 950 HBM stockpile SAMSUNG, SK HYNIX Domestic OSAT NOT DISCLOSED, CHINA CloudMatrix ATLAS SUPERPOD TSMC CUT SINCE 2020 ASML EUV NEVER SOLD TO CHINA NEW HBM IMPORTS CUT SINCE DEC 2024 SOLID: ROUTES IN USE DASHED: ROUTES CUT BY US CONTROLS STOCKPILE IS FINITE; CXMT AND HUAWEI MEMORY ARE THE LONG-RUN ROUTE
Every working link in the Ascend chain is in China or draws on stock bought before the controls. The dashed routes are the ones US controls closed.
  • Made in US
  • Some US volume
  • US planned
  • Made abroad
  • Not disclosed
Huawei Ascend 910C supplier ring (SemiconductorX chip supplier dataset)
ComponentSupplierRoleLocationEvidenceUS status
Logic dieSMICPrimaryShanghai, ChinaClaimedMade abroad
Logic dieTSMCSecond sourceTaiwanConfirmedMade abroad
HBMSamsungPrimarySouth KoreaConfirmedMade abroad
HBMSK hynixSecond sourceSouth KoreaConfirmedMade abroad
HBMCXMTSecond sourceHefei, ChinaClaimedMade abroad
Advanced packagingNot disclosedPrimaryChinaInferredMade abroad
Final testNot disclosedPrimaryChinaInferredMade abroad

None of the seven links is made in the US, and Huawei has no US route to add. The full record, with sources for each row, is on the Ascend 910C supplier ring. The same dataset shows the opposite pattern for the other nine chips tracked: TSMC appears in all nine, and the supplier rings hub compares all 10.

Foundry

SMIC N+3 and Hybrid Bonding Stand In for EUV

Kirin phone chips and where they are made
ChipPhoneProcessNote
Kirin 9000Mate 40 (2020)TSMC 5nmLast HiSilicon chip made at TSMC under normal terms
Kirin 9000SMate 60 Pro (2023)SMIC N+2, 7nm classFirst proof of 7nm-class volume without EUV
Kirin 9010, 9020Pura 70, Mate 70 (2024)SMIC N+2Same node, redesigned cores
Kirin 9030Mate 80 (late 2025)SMIC N+3TechInsights: denser than N+2 but well short of 5nm
Kirin 9050 ProMate 90 Pro Max (2026)SMIC N+3 compute die on N+2 die, hybrid-bondedLogicFolding; first mass-produced Huawei stacked logic
Cross-section of the Kirin 9050 Pro as shown in a Geekerwan teardown: a compute die on SMIC N+3 is hybrid-bonded face to face onto a second die on SMIC N+2 that holds cache, I/O and clocking. About 80,000 through-silicon vias in the bottom die carry signals and power to the package substrate. Huawei calls the design LogicFolding and says it raised transistor density by 53.5%. KIRIN 9050 PRO, LOGICFOLDING CROSS-SECTION (SCHEMATIC, NOT TO SCALE) Compute die, SMIC N+3 Cache, I/O and clock die, SMIC N+2 PACKAGE SUBSTRATE HYBRID BOND LAYER COPPER TO COPPER, NO BUMPS; HUAWEI CITES 50M+ BONDS THROUGH-SILICON VIAS ABOUT 80,000; KEEP-OUT ZONES TAKE ABOUT 8% OF THE BOTTOM DIE EACH MAJOR BLOCK SPANS BOTH DIES (NPU AREA 150% LARGER THAN KIRIN 9030 PRO) STACKING TWO DUV-MADE DIES ADDS DENSITY PER PACKAGE THAT EUV WOULD ADD PER DIE. HUAWEI CLAIMS +53.5% TRANSISTOR DENSITY. NODES FROM THE GEEKERWAN TEARDOWN (NOTEBOOKCHECK, OCTOBER 3, 2026); NOT CONFIRMED BY HUAWEI OR SMIC.
Huawei now adds density by stacking two dies rather than by shrinking one. The same hybrid bonding route is what CXMT says it uses in its newest DRAM.

SMIC makes every current Huawei chip. Its N+2 process (7nm class) uses deep ultraviolet (DUV) scanners with multiple patterning, and N+3 pushes the same tools further; TechInsights confirmed N+3 in the Kirin 9030 in December 2025 and found it denser than N+2 but well short of commercial 5nm nodes. With no EUV, each step costs more exposures and yield. The Kirin 9050 Pro takes another route: two dies, one on each node, joined copper to copper so that each major block spans both. Huawei says LogicFolding uses more than 50 million hybrid bonds and raised transistor density by 53.5%. China still imports most hybrid bonding equipment; Piotech, the leading domestic maker, reported 136 million yuan of bonding tool revenue in 2025.

SMIC itself is running full. Second-quarter 2026 revenue was $3.006 billion, its first quarter above $3 billion, with 93.7% utilization and 90.2% of revenue from China. See Process Nodes and Hybrid Bonding.

Memory

HBM, Not Logic Wafers, Caps Ascend Output

Where Ascend memory comes from
SourceWhatStatus
StockpileSamsung and SK hynix HBM bought before the December 2024 controls; about 11.7 million stacks (SemiAnalysis estimate)Finite; found in 910C teardowns
CXMT, HefeiHBM3, then HBM3EHBM3 sampling to Huawei; HBM3E in small-scale production by late August 2026, tested by T-Head and Cambricon (reported)
Huawei-designed memoryHiBL 1.0 (128 GB, 1.6 TB/s) in the Ascend 950PR; HiZQ 2.0 (144 GB, 4 TB/s) in the 950DTAnnounced September 2025; maker not disclosed

HBM caps Ascend output more than logic wafers do. SMIC has wafer capacity for more than a million Ascend dies a year, but every package needs memory stacks, and China's own HBM is early: SemiAnalysis put CXMT's overall yield on eight-layer HBM3 at about 25% in June 2026, and lower for 12-layer parts. CXMT's scale is not the limit. It listed on Shanghai's STAR Market in July 2026 and reported first-half revenue of 150.3 billion yuan, up 874%, on commodity DRAM prices. See HBM.

Roadmap

Huawei Answers the Per-Chip Gap With Chip Count

Ascend roadmap, as announced at Huawei Connect, September 2025
ChipTimingLogicMemorySystem
Ascend 910C2025, in volumeTwo 910B dies, SMIC N+2Stockpiled HBMAtlas 900 A3 SuperPoD: 384 chips
Ascend 950PR2026; mass production from April (reported)SMICHiBL 1.0, 128 GB, 1.6 TB/sInference prefill and recommendation
Ascend 950DT2026SMICHiZQ 2.0, 144 GB, 4 TB/sAtlas 950 SuperPoD: 8,192 chips in 160 cabinets, fourth quarter 2026
Ascend 9602027 (planned)Not disclosedTwice the 950's capacityAtlas 960 SuperPoD: 15,488 chips in 220 cabinets
Ascend 9702028 (planned)Not disclosedNot disclosedHigher performance than the 960

Bloomberg reported in September 2025 that Huawei planned about 600,000 Ascend 910C chips for 2026, double 2025, and up to 1.6 million dies across the line, with yields still low. A March 2026 report put the 950PR plan at about 750,000 units for the year; neither figure is confirmed by Huawei. The roadmap answers the per-chip gap with scale: superpods of thousands of chips, Huawei's own memory and its CANN software stack, which Huawei said in 2025 it would open-source along with the MindSpore framework.

Controls

Cut Off From TSMC Since 2020

Controls that shaped Huawei's chip supply
DateMeasureEffect on Huawei
May 15, 2020US Foreign Direct Product Rule extended to HuaweiTSMC stopped making HiSilicon chips; Kirin 9000 was the last
2023Kirin 9000S ships on SMIC N+2Showed 7nm-class volume without EUV
2024TSMC dies reach the 910C through Sophgo (about three million, SemiAnalysis)TSMC says it halted the orders; the die bank is used up
December 2, 2024US controls on HBM sales to China and more chipmaking toolsNew HBM imports cut; stockpile and CXMT remain
April 2025US license required for NVIDIA H20 sales to ChinaLast legal NVIDIA product for China removed for a time
September 2025Beijing tells state buyers to stop buying NVIDIA GPUs (reported)Ascend favored in state-linked purchases
January 13, 2026US moves H200 licenses for China to case-by-case reviewNVIDIA licensed for small quantities; supply limited

Each round of US controls has pushed Huawei further into a domestic chain, and Beijing's buying rules have handed that chain demand. The broader picture across foundry, memory, tools and materials is on China Bifurcation.

Record

Page Record

Covers
Huawei and HiSilicon: China AI accelerator share, the Ascend supplier ring, SMIC N+2 and N+3, the Kirin 9050 LogicFolding stack, HBM sources, the Ascend roadmap and SuperPoDs, and the US controls since 2020
Sources
IDC via Reuters and TechNode (China AI accelerator shares and units, first half of 2026, October 14, 2026); TechInsights (Kirin 9030 and SMIC N+3, December 11, 2025); Notebookcheck citing a Geekerwan teardown (Kirin 9050 Pro, October 3, 2026); SemiAnalysis and Huawei via KuCoin News (LogicFolding bonds and density, Piotech, October 16, 2026); SMIC second-quarter 2026 results via AnySilicon; Korea JoongAng Daily citing The Information and SemiAnalysis (CXMT HBM3E, revenue and IPO, September 1, 2026); Reuters factbox (Ascend roadmap and SuperPoDs, September 18, 2025); Bloomberg via Gulf News (2026 output plans, September 2025); Newsquawk (950PR production plan, March 27, 2026, reported); Igor's Lab citing NVIDIA's 10-K and Reuters (H200 licensing, 2026); SemiconductorX chip supplier dataset (Ascend 910C ring)
Last verified
October 2026